Solder bump inspection of surface mount packages has been a crucial process in the electronics manufacturing industry. A solder bump inspection system has been developed using laser ultrasound and interferometric techniques. In this research, modal analysis is important to correlate the defects with dynamic responses of packaged electronic devices under pulsed laser loading. The effect of solder bump defects on the mode frequencies and mode shapes is reported in this paper. The objective is to develop a modal analysis approach, which integrates analytical, numerical, and experimental methods. In particular, this paper discusses the analytical modeling, numerical modeling, and transient out-of-plane displacement measurements for a PB18 flip chip mounted on a FR4 board.
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e-mail: charles.ume@me.gatech.edu
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September 2008
Research Papers
Quality Inspection of Flip Chip Solder Bumps Using Integrated Analytical, Numerical, and Experimental Modal Analyses
Jin Yang,
Jin Yang
George W. Woodruff School of Mechanical Engineering,
Georgia Institute of Technology
, MaRC Building, Room 453, Atlanta, GA 30332-0405
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I. Charles Ume
I. Charles Ume
Fellow ASME
George W. Woodruff School of Mechanical Engineering,
e-mail: charles.ume@me.gatech.edu
Georgia Institute of Technology
, MaRC Building, Room 453, Atlanta, GA 30332-0405
Search for other works by this author on:
Jin Yang
George W. Woodruff School of Mechanical Engineering,
Georgia Institute of Technology
, MaRC Building, Room 453, Atlanta, GA 30332-0405
I. Charles Ume
Fellow ASME
George W. Woodruff School of Mechanical Engineering,
Georgia Institute of Technology
, MaRC Building, Room 453, Atlanta, GA 30332-0405e-mail: charles.ume@me.gatech.edu
J. Electron. Packag. Sep 2008, 130(3): 031009 (10 pages)
Published Online: August 1, 2008
Article history
Received:
August 14, 2007
Revised:
January 7, 2008
Published:
August 1, 2008
Citation
Yang, J., and Ume, I. C. (August 1, 2008). "Quality Inspection of Flip Chip Solder Bumps Using Integrated Analytical, Numerical, and Experimental Modal Analyses." ASME. J. Electron. Packag. September 2008; 130(3): 031009. https://doi.org/10.1115/1.2957328
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