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Proceedings Papers

Next Gen Test-Vehicle to Simulate Thermal Load for IoT FPGA Applications

Suresh Parameswaran, Gamal Refai-Ahmed, Suresh Ramalingam, Boon Ang

Proc. ASME. InterPACK2018, ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, V001T02A004, August 27–30, 2018

Paper No: IPACK2018-8300

DOI: https://doi.org/10.1115/IPACK2018-8300

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Topics: Internet of things, Stress, Vehicles, Circuits, Computer software, Cooling, Cycles, Energy dissipation, Flip-chip packages, Modeling

Proceedings Papers

Reliability Analysis of Ultra-Low-K Large-Die Package and Wire Bond Chip Package on Varying Structural Parameter Under Thermal Loading

Unique Rahangdale, Pavan Rajmane, Abel Misrak, Dereje Agonafer

Proc. ASME. InterPACK2017, ASME 2017 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, V001T01A020, August 29–September 1, 2017

Paper No: IPACK2017-74279

DOI: https://doi.org/10.1115/IPACK2017-74279

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Topics: Event history analysis, Wire, Reliability, Failure, Solders, Copper, Dielectric materials, Manufacturing, Microelectronic devices, Solder joints

Proceedings Papers

Large Flip Chip Assembly Challenges and Risk Mitigation Process

Jeremy Plunkett, Suresh Subramaniam, Nokibul Islam, Kang KeonTaek, Gu SeonMo, Eric Ouyang

Proc. ASME. InterPACK2017, ASME 2017 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, V001T01A008, August 29–September 1, 2017

Paper No: IPACK2017-74026

DOI: https://doi.org/10.1115/IPACK2017-74026

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Topics: Ball-Grid-Array packaging, Copper, Cracking (Materials), Delamination, Failure, Flip-chip, Flip-chip assemblies, Flip-chip devices, Flip-chip packages, Fracture (Process)

Proceedings Papers

An Efficient Bump Pad Design to Mitigate the Flip Chip Package Induced Stress

Mario Gonzalez, Joeri De Vos, Geert Van der Plas, Eric Beyne

Proc. ASME. InterPACK2015, Volume 2: Advanced Electronics and Photonics, Packaging Materials and Processing; Advanced Electronics and Photonics: Packaging, Interconnect and Reliability; Fundamentals of Thermal and Fluid Transport in Nano, Micro, and Mini Scales, V002T02A018, July 6–9, 2015

Paper No: IPACK2015-48111

DOI: https://doi.org/10.1115/IPACK2015-48111

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Topics: Design, Flip-chip packages, Stress, Copper, Columns (Structural), Polishing equipment, Solders, Finite element model, Flip-chip, Flip-chip devices

Proceedings Papers

Effects of Low CTE Materials on Thermal Deformation of Organic Substrates in Flip Chip Package Application

Hiroyuki Mori, Sayuri Kohara, Keishi Okamoto, Hirokazu Noma, Kazushige Toriyama

Paper No: IPACK2015-48741

DOI: https://doi.org/10.1115/IPACK2015-48741

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Topics: Flip-chip packages, Thermal deformation, Warping, Finite element analysis, Manufacturing, Package on package, Shapes, Deformation, Finite element model, Flip-chip

Proceedings Papers

Thermal Diffusion Tomography for Quantitative Non-Destructive Characterization of Electronic Packages

Bahar Öner, Hakan Ertürk

Proc. ASME. InterPACK2015, Volume 1: Thermal Management, V001T09A055, July 6–9, 2015

Paper No: IPACK2015-48333

DOI: https://doi.org/10.1115/IPACK2015-48333

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Topics: Electronic packages, Nondestructive evaluation, Thermal diffusion, Heat, Acoustics, Algorithms, Contact resistance, Density, Energy dissipation, Flat heat pipes

Proceedings Papers

A Fracture Mechanics Based Parametric Study of the Copper-to-Copper Direct Thermo-Compression Bonded Interface Using Finite Element Method

Ah-Young Park, Satish Chaparala, Seungbae Park

Proc. ASME. InterPACK2013, Volume 1: Advanced Packaging; Emerging Technologies; Modeling and Simulation; Multi-Physics Based Reliability; MEMS and NEMS; Materials and Processes, V001T01A006, July 16–18, 2013

Paper No: IPACK2013-73280

DOI: https://doi.org/10.1115/IPACK2013-73280

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Topics: Compression, Copper, Finite element methods, Fracture mechanics, Bonding, Fracture (Materials), Solders, Density, Joining, Temperature

Proceedings Papers

Solder Joint Reliability in Underfilled Flip Chip Package With a Consideration of Chip-Package-Interaction (CPI)

Jae B. Kwak, Da Yu, Tung T. Nguyen, Seungbae Park

Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1, 307-316, July 6–8, 2011

Paper No: IPACK2011-52233

DOI: https://doi.org/10.1115/IPACK2011-52233

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Topics: Flip-chip packages, Reliability, Solder joints, Solders, Finite element analysis, Corners (Structural elements), Stress, Thermomechanics, Chemical etching, Damage

Proceedings Papers

Nature of Package-Induced Deformation and the Risk of Fracture in Low-k Dielectric Stacks

Hung-Yun Lin, Abhishek Tambat, Ian Claydon, Ganesh Subbarayan, Dae Young Jung, Bahgat Sammakia

Paper No: IPACK2011-52258

DOI: https://doi.org/10.1115/IPACK2011-52258

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Topics: Deformation, Fracture (Process), Risk, Temperature, Computer software, Cooling, Finite element analysis, Flip-chip, Flip-chip devices, Flip-chip packages

Proceedings Papers

PCR for Derivation of Parameter Dependencies, Thermo-Mechanical Norris-Landzberg Acceleration Factors, Goldmann Fatigue Constants for Leadfree Electronics

Pradeep Lall, Aniket Shirgaokar, Dineshkumar Arunachalam, Jeff Suhling, Mark Strickland, Jim Blanche

Proc. ASME. InterPACK2009, ASME 2009 InterPACK Conference, Volume 2, 159-170, July 19–23, 2009

Paper No: InterPACK2009-89329

DOI: https://doi.org/10.1115/InterPACK2009-89329

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Topics: Electronics, Fatigue, Thermomechanics, Temperature, Ball-Grid-Array packages, Cycles, Reliability, Alloys, Architecture, Copper

Proceedings Papers

High Performance Flip Chip Package With Higher Mountability and Longer Interconnect Life

Satoru Katsurayama, Hironori Tohmyoh, Masumi Saka

Proc. ASME. InterPACK2009, ASME 2009 InterPACK Conference, Volume 1, 749-753, July 19–23, 2009

Paper No: InterPACK2009-89148

DOI: https://doi.org/10.1115/InterPACK2009-89148

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Topics: Flip-chip packages, Warping, Reliability, Cycles, Manufacturing, Stress

Proceedings Papers

Stress Measurement Errors in Flip Chip Packages Using Multi-Element Sensor Rosettes on (111) Silicon

Richard C. Jaeger, Jeffrey C. Suhling, Safina Hussain, Jordan C. Roberts, Mohammad A. Motalab, Chun-Hyung Cho

Proc. ASME. InterPACK2009, ASME 2009 InterPACK Conference, Volume 1, 15-25, July 19–23, 2009

Paper No: InterPACK2009-89245

DOI: https://doi.org/10.1115/InterPACK2009-89245

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Topics: Errors, Flip-chip packages, Sensors, Silicon, Stress, Temperature, Integrated circuits, Electronic packages, Finite element model, Flip-chip

Proceedings Papers

Visco-Elastic Effect of Underfill Material in Reliability Analysis of Flip-Chip Package

Yoshihiko Kanda, Kunihiro Zama, Yoshiharu Kariya, Takao Mikami, Takaya Kobayashi, Toshiyuki Sato, Toshiaki Enomoto, Koichi Hirata

Proc. ASME. InterPACK2009, ASME 2009 InterPACK Conference, Volume 1, 755-759, July 19–23, 2009

Paper No: InterPACK2009-89152

DOI: https://doi.org/10.1115/InterPACK2009-89152

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Topics: Event history analysis, Flip-chip packages, Fatigue life, Finite element analysis, Viscoelasticity, Cooling, Solders, Warping

Proceedings Papers

Thermal Degradation and Mass Transport of Underfill Material

Wen-Hao Lee, D. S. Liang, W. P. Wang, C. S. Hsiao

Proc. ASME. InterPACK2007, ASME 2007 InterPACK Conference, Volume 2, 719-723, July 8–12, 2007

Paper No: IPACK2007-33057

DOI: https://doi.org/10.1115/IPACK2007-33057

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Topics: Absorption, Adhesion, Bond strength, Bonding, Chain, Cracking (Materials), Diffusion (Physics), Epoxy adhesives, Epoxy resins, Failure

Proceedings Papers

Reliability of Flip Chip Package Depending on Underfill Encapsulating Processes

Satoru Katsurayama, Masumi Saka

Proc. ASME. InterPACK2007, ASME 2007 InterPACK Conference, Volume 2, 9-12, July 8–12, 2007

Paper No: IPACK2007-33562

DOI: https://doi.org/10.1115/IPACK2007-33562

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Topics: Flip-chip packages, Reliability, Warping, Stress, Deformation, Flip-chip, Flip-chip devices, Flow (Dynamics), Manufacturing

Proceedings Papers

Optimization of Copper Column Flip Chip Packages Incorporating a Variable Interconnect Compliance Configuration

Andrew A. O. Tay, Siow Ling Ho

Proc. ASME. InterPACK2007, ASME 2007 InterPACK Conference, Volume 1, 117-122, July 8–12, 2007

Paper No: IPACK2007-33991

DOI: https://doi.org/10.1115/IPACK2007-33991

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Topics: Copper, Flip-chip packages, Optimization, Solder joints, Creep, Fatigue life, Reliability, Finite element analysis, Semiconductor wafers

Proceedings Papers

Shape Prediction of Molten Micro-Solder Joints Using Particle Method and Application to Evaluation of Fracture Life

Hisashi Tanie

Proc. ASME. InterPACK2007, ASME 2007 InterPACK Conference, Volume 1, 87-94, July 8–12, 2007

Paper No: IPACK2007-33319

DOI: https://doi.org/10.1115/IPACK2007-33319

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Topics: Fracture (Materials), Particulate matter, Shapes, Solders, Crack propagation, Topology, Deformation, Lead-free solders, Solder joints, Finite element analysis

Proceedings Papers

On the Multiscale Finite Element Analysis for Interfacial Fracture in Cu/Low-K Interconnects

Tz-Cheng Chiu, Huang-Chun Lin

Proc. ASME. InterPACK2007, ASME 2007 InterPACK Conference, Volume 1, 79-85, July 8–12, 2007

Paper No: IPACK2007-33204

DOI: https://doi.org/10.1115/IPACK2007-33204

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Topics: Finite element analysis, Fracture (Materials), Thin films, Fracture mechanics, Errors, Etching, Flip-chip packages, Integrated circuits, Modeling, Multiscale modeling

Proceedings Papers

Solder Joint Reliability Prediction of Flip Chip Packages Under Shock Loading Environment

Wei Keat Loh, Luke J. Garner

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1433-1440, July 17–22, 2005

Paper No: IPACK2005-73213

DOI: https://doi.org/10.1115/IPACK2005-73213

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Topics: Flip-chip packages, Reliability, Shock (Mechanics), Solder joints

Proceedings Papers

Numerical Model to Analyse IC Chip Encapsulation Process

Venkatesh M. Kulkarni, Ishak Abdul Azid, K. N. Seetharamu, P. A. Aswatha Narayana

Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1841-1848, July 17–22, 2005

Paper No: IPACK2005-73197

DOI: https://doi.org/10.1115/IPACK2005-73197

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Topics: Computer simulation, Flip-chip packages, Flow (Dynamics), Fluids, Simulation, Cavities, Epoxy adhesives, Epoxy resins, Geometry, Pressure

NARROW

Next Gen Test-Vehicle to Simulate Thermal Load for IoT FPGA Applications

Reliability Analysis of Ultra-Low-K Large-Die Package and Wire Bond Chip Package on Varying Structural Parameter Under Thermal Loading

Large Flip Chip Assembly Challenges and Risk Mitigation Process

An Efficient Bump Pad Design to Mitigate the Flip Chip Package Induced Stress

Effects of Low CTE Materials on Thermal Deformation of Organic Substrates in Flip Chip Package Application

Thermal Diffusion Tomography for Quantitative Non-Destructive Characterization of Electronic Packages

A Fracture Mechanics Based Parametric Study of the Copper-to-Copper Direct Thermo-Compression Bonded Interface Using Finite Element Method

Solder Joint Reliability in Underfilled Flip Chip Package With a Consideration of Chip-Package-Interaction (CPI)

Nature of Package-Induced Deformation and the Risk of Fracture in Low-k Dielectric Stacks

PCR for Derivation of Parameter Dependencies, Thermo-Mechanical Norris-Landzberg Acceleration Factors, Goldmann Fatigue Constants for Leadfree Electronics

High Performance Flip Chip Package With Higher Mountability and Longer Interconnect Life

Stress Measurement Errors in Flip Chip Packages Using Multi-Element Sensor Rosettes on (111) Silicon

Visco-Elastic Effect of Underfill Material in Reliability Analysis of Flip-Chip Package

Thermal Degradation and Mass Transport of Underfill Material

Reliability of Flip Chip Package Depending on Underfill Encapsulating Processes

Optimization of Copper Column Flip Chip Packages Incorporating a Variable Interconnect Compliance Configuration

Shape Prediction of Molten Micro-Solder Joints Using Particle Method and Application to Evaluation of Fracture Life

On the Multiscale Finite Element Analysis for Interfacial Fracture in Cu/Low-K Interconnects

Solder Joint Reliability Prediction of Flip Chip Packages Under Shock Loading Environment

Numerical Model to Analyse IC Chip Encapsulation Process

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