Sintered silver-based bonded interfaces are a critical enabling technology for high-temperature, compact, high-performance, and reliable wide-bandgap packages and components. High-pressure (∼40 MPa) sintered silver interfaces have been implemented commercially, most notably the commercial products offered by Semikron. To reduce manufacturing complexity, there is significant industry interest in pressure-less sintered silver interfaces. To this end, current formulations of sintered silver paste are comprised of purely nano-sized silver particles or a combination of nano- and micro-sized silver particles/flakes. It is essential to quantify the mechanical properties and determine the reliability of these interfaces prior to use in automotive power electronics applications. In this paper, research efforts at the National Renewable Energy Laboratory, in collaboration with Virginia Polytechnic Institute and State University and an industry partner, in optimizing the synthesis procedure and mechanical characterization of sintered silver double-lap samples are described. These double-lap samples were synthesized using pressure-less sintering techniques. Shear testing was conducted at multiple temperatures and displacement rates on these samples sintered using two types of sintered sintered silver pastes, one of them consisting of nano-silver particles and the other a hybrid paste or a combination of nano- and micron-sized silver flakes, employed in a double-lap configuration. Maximum values of shear stress obtained from the characterization study are reported.
- Electronic and Photonic Packaging Division
Mechanical Characterization Study of Sintered Silver Pastes Bonded in a Double-Lap Configuration
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Paret, P, Major, J, DeVoto, D, Narumanchi, S, Tan, Y, & Lu, G. "Mechanical Characterization Study of Sintered Silver Pastes Bonded in a Double-Lap Configuration." Proceedings of the ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. San Francisco, California, USA. August 27–30, 2018. V001T04A006. ASME. https://doi.org/10.1115/IPACK2018-8276
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